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Further on an 8-core CMP with a mix of multiprogrammed workloads, the adaptive method outperforms the state-of-the-art throttling methods by 8 % in speedup, while reducing the memory traffic by 3 %. Simulation results with a mixed suite of integer and floating point benchmarks from SPEC CPU2006 show that on a single-core processor both aggressive and adaptive methods outperform existing prefetchers by 48 and 28 %, respectively, while increasing the memory traffic by 20 and 14 %, respectively. This adaptive method is suitable for CMP processors where the prefetcher resides in the shared LCC.

As the aggressiveness of this prefetcher is relatively high, we further propose an efficient throttling procedure to reduce the negative effects of wrong prefetching using a new measure of cache pollution. Furthermore with a variable pattern length mechanism, constant strides are grouped, such that more accurate patterns are detected. The result is an aggressive prefetcher that can generate more addresses with a given pattern length. To resolve these problems, we separate the pattern length from the prefetching degree. In this paper, we show that a fixed value for detecting patterns and prefetch degree makes GHB to (1) be conservative while there are more opportunities to create new addresses and (2) generate wrong addresses in the presence of constant strides. Among many prefetching methods in recent years, the Global History Buffer (GHB) proves to be efficient in terms of cost and speedup.

Data prefetching is a well-known technique to hide the memory latency in the last-level cache (LCC).

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